1. Field of the Invention
The present invention relates in general to integrated circuits and in particular to semiconductor memories. Still more particularly, the present invention relates to a method and system for testing semiconductor memories.
2. Description of the Prior Art
Memories are devices that respond to operational orders, usually from a central processing unit. Memories may store large quantities of information in a digital format. In a memory system or unit, addresses are used to access the contents of the memory unit. A binary digit, a bit, is the basic information element stored in memory. The smallest subdivision of a memory unit into which a bit of information can be stored is called a memory cell. A memory on a chip is physically arranged as a two-dimensional array of cells, wherein rows of cells are connected by row lines or, also called word lines. A column of cells are connected by a column line, also called a bit line. These memory cells may be constructed by various configurations of transistors and/or capacitors.
In constructing semiconductor memories, it is desirable to test the memory cells to identify and locate defective memory cells or errors in processing. Additionally, memories are tested to determine the speed and performance of a memory. As the sides of memories increase and as the quantities of memories produced increase, testing of these memories throughout the different stages of processing increases the amount of time and cost needed to produce a semiconductor memory.
More information on semiconductor memories may be found in Haznedar, Digital Microelectronics, the Benjamin/Cummings Publishing Company, Inc. (1991). Prince, Semiconductor Memories, John Wiley and Sons (2d Ed. 1991).
As a result, it would be desirable to have a method and system for rapidly testing semiconductor memories.